It is desirable to prevent electrostatically generated voltage spikes from occurring during fabrication of electronic components.
This is done on the one hand, by means of known electrostatic protective measures such as, by way of example, electrically conductive work surfaces, antistatic strips, appropriate furniture, clothing, floor covering, ionized ambient air or grounding.
On the other hand, electronic components such as transistors, for example, that are to be protected against ESD often contain one or more additional doped regions (also called ESD regions or ESD implantations hereinafter) for improving the protective effect against electrostatic discharges. In the case of a field effect transistor (FET) ESD implantations are usually introduced on the source/drain regions and the contacts of the transistor to be improved (so-called contact hole implantation).